A topology synthesis method is introduced using genetic algorithms (GA) based on novelty search (NS). NS is an emerging meta-heuristic, that guides the search based on the novelty of each solution instead of the objective function. The synthesized topologies are current follower (CF) circuits; these topologies are new and designed using integrated circuit CMOS technology of 0.35m. Topologies are coded using a chromosome divided into four genes: small signal gene (SS), MOSFET synthesis gene (SMos), polarization gene (Bias) and current source synthesis gene (CM). The proposed synthesis method is coded in MatLab and uses SPICE to evaluate the CFs fitness. The GA based on NS (GA-NS) is compared with a standard objective-based GA, showing unique search dynamics and improved performance. Experimental results show twelve CFs synthesized by the GA-NS algorithm, and their main attributes are summarized and discussed. This work is the first to show that NS can be used asa promising alternative in the field of automatic circuit synthesis.

A topology synthesis method is introduced using genetic algorithms (GA) based on novelty search (NS). NS is an emerging meta-heuristic, that guides thesearch based on the novelty of each solution instead of the objective function. The synthesized topologies are current follower (CF) circuits; these topologies are new and designed using integrated circuit CMOS technology of 0.35m. Topologies are coded using a chromosome divided into four genes: small signal gene (SS), MOSFET synthesis gene (SMos), polarization gene (Bias) and current source synthesis gene (CM). The proposed synthesis method is coded in MatLaband uses SPICE to evaluate the CFs fitness. The GAbased on NS (GA-NS) is compared with a standard objective-based GA, showing unique search dynamicsand improved performance. Experimental results showtwelve CFs synthesized by the GA-NS algorithm, and their main attributes are summarized and discussed.This work is the first to show that NS can be used asa promising alternative in the field of automatic circuit synthesis.